Solid-State Electronics
Solid-State Electronics, Vol.48, No.8 Entire volume, number list
ISSN: 0038-1101 (Print)
In this Issue (21 articles)
| 1255 - 1255 |
Special issue on strained-Si heterostructures and devices - Editorial Maiti CK |
| 1257 - 1263 |
Strain adjustment with thin virtual substrates Kasper E, Lyutovich K |
| 1265 - 1278 |
Control over strain relaxation in Si-based heterostructures Izyumskaya NF, Avrutin VS, Vyatkin AF |
| 1279 - 1284 |
Relaxation mechanism of low temperature SiGe/Si(001) buffer layers Vescan L, Wickenhauser S |
| 1285 - 1296 |
Engineering strained silicon on insulator wafers with the Smart Cut (TM) technology Ghyselen B, Hartmann JM, Ernst T, Aulnette C, Osternaud B, Bogumilowicz Y, Abbadie A, Besson P, Rayssac O, Tiberj A, Daval N, Cayrefourq I, Fournel F, Moriceau H, Di Nardo C, Andrieu F, Paillard V, Cabie M, Vincent L, Snoeck E, Cristiano F, Rocher A, Ponchet A, Claverie A, Boucaud P, Semeria MN, Bensahel D, Kernevez B, Mazure C |
| 1297 - 1305 |
Strained Si, SiGe, and Ge on-insulator: review of wafer bonding fabrication techniques Taraschi G, Pitera AJ, Fitzgerald EA |
| 1307 - 1316 |
Selective epitaxial deposition of strained silicon: a simple and effective method for fabricating high performance MOSFET devices Delhougne R, Eneman G, Caymax M, Loo R, Meunier-Beillard P, Verheyen P, Vandervorst W, De Meyer K, Heyns M |
| 1317 - 1323 |
Low-energy plasma-enhanced chemical vapor deposition for strained Si and Ge heterostructures and devices Isella G, Chrastina D, Rossner B, Hackbarth T, Herzog H, Konig U, von Kanel H |
| 1325 - 1335 |
Monte Carlo modeling of the electron mobility in strained Si1-x,Ge-x layers on arbitrarily oriented Si1-yGey substrates Smirnov S, Kosina H |
| 1337 - 1346 |
The impact of interface roughness scattering and degeneracy in relaxed and strained Si n-channel MOSFETs Watling JR, Yang L, Borici M, Wilkins RCW, Asenov A, Barker JR, Roy S |
| 1347 - 1355 |
Simulation and modelling of transport properties in strained-Si and strained-Si/SiGe-on-insulator MOSFETs Roldan JB, Gamiz F |
| 1357 - 1367 |
Strained Si on insulator technology: from materials to devices Langdo TA, Currie MT, Cheng ZY, Fiorenza JG, Erdtmann M, Braithwaite G, Leitz CW, Vineis C, Carlin JA, Lochtefeld A, Bulsara MT, Lauer I, Antoniadis DA, Somerville M |
| 1369 - 1389 |
Gate dielectrics on strained Si/SiGe heterolayers Maiti CK, Samanta SK, Chatterjee S, Dalapati GK, Bera LK |
| 1391 - 1399 |
Contact metallization on strained-Si Saha AR, Chattopadhyay S, Maiti CK |
| 1401 - 1406 |
Comparison of sub-micron Si : SiGe heterojunction nFETs to Si nMOSFET in present-day technologies Fobelets K, Jeamsaksiri W, Papavasilliou C, Vilches T, Gaspari V, Velazquez-Perez JE, Michelakis K, Hackbarth T, Konig U |
| 1407 - 1416 |
Strained Si MOSFETs on relaxed SiGe platforms: performance and challenges Chattopadhyay S, Driscoll LD, Kwa KSK, Olsen SH, O'Neill AG |
| 1417 - 1422 |
Investigation of strained Si/SiGe devices by MC simulation Jungemann C, Subba N, Goo JS, Riecobene C, Xiang Q, Meinerzhagen B |
| 1423 - 1431 |
Buried-channel SiGe HMODFET device potential for micropower applications Vilches A, Michelakis K, Fobelets K, Haigh D, Papavassiliou C, Hackbath T, Konig U |
| 1433 - 1441 |
Large-signal modelling including low-frequency dispersion of n-channel SiGe MODFETs and MMIC applications Kallfass I, Brazil TJ, OhAnnaidh B, Abele P, Hackbarth T, Zeuner M, Konig U, Schumacher H |
| 1443 - 1452 |
Strained Si HFETs for microwave applications: state-of-the-art and further approaches Aguilar ME, Rodriguez M, Zerounian N, Aniel F, Hackbarth T, Herzog HJ, Konig U, Mantl S, Hollander B, Chrastina D, Isella G, von Kanel H, Lyutovich K |
| 1453 - 1460 |
Power analysis of strained-Si device s/circuits Kim K, Joshi RV, Chuang CT |