화학공학소재연구정보센터
검색결과 : 5건
No. Article
1 Strain engineering of ultra-thin silicon-on-insulator structures using through-buried-oxide ion implantation and crystallization
Ding YJ, Cheng R, Zhou Q, Du AY, Daval N, Nguyen BY, Yeo YC
Solid-State Electronics, 83, 37, 2013
2 Dual strained channel CMOS in FDSOI architecture: New insights on the device performance
Le Royer C, Casse M, Cooper D, Andrieu F, Weber O, Brevard L, Perreau P, Damlencourt JF, Baudot S, Previtali B, Tabone C, Allain F, Scheiblin P, Rauer C, Figuet C, Aulnette C, Daval N, Nguyen BY, Bourdelle KK, Gyani J, Valenza M
Solid-State Electronics, 65-66, 9, 2011
3 Monolithic integration of InP-based transistors on Si substrates using MBE
Liu WK, Lubyshev D, Fastenau JM, Wu Y, Bulsara MT, Fitzgerald EA, Urteaga M, Ha W, Bergman J, Brar B, Hoke WE, LaRoche JR, Herrick KJ, Kazior TE, Clark D, Smith D, Thompson RF, Drazek C, Daval N
Journal of Crystal Growth, 311(7), 1979, 2009
4 Engineering strained silicon on insulator wafers with the Smart Cut (TM) technology
Ghyselen B, Hartmann JM, Ernst T, Aulnette C, Osternaud B, Bogumilowicz Y, Abbadie A, Besson P, Rayssac O, Tiberj A, Daval N, Cayrefourq I, Fournel F, Moriceau H, Di Nardo C, Andrieu F, Paillard V, Cabie M, Vincent L, Snoeck E, Cristiano F, Rocher A, Ponchet A, Claverie A, Boucaud P, Semeria MN, Bensahel D, Kernevez B, Mazure C
Solid-State Electronics, 48(8), 1285, 2004
5 SiC power devices on QUASIC and SiCOI Smart-Cut (R) substrates: First demonstrations
Letertre F, Daval N, Templier F, Bano E, Planson D, Di Ciocco L, Jalaguier E, Bluet JM, Billon T, Madar R, Chante JP
Materials Science Forum, 433-4, 813, 2002