Generation of stacking faults (SFs) in fast epitaxial growth of 4H-SiC(0001) has been reduced in vertical hot-wall chemical vapor deposition (CVD). 52 μ m-thick epilayers with and without SFs are used to investigate impacts of SFs on the performance of Schottky barrier diodes (SBDs). The density, shape and structure of stacking faults have been characterized by cathodeluminescence (CL), photoluminescence (PL) and high-resolution transmission electron microscopy (HR-TEM). These analyses indicate that most (> 75 %) SFs with an 8H structure are generated near the epilayer/substrate interface during CVD. It is also revealed that the SFs cause the lowering of Schottky barrier height as well as the decrease of breakdown voltage.