검색결과 : 2건
| No. | Article |
|---|---|
| 1 |
Impact of threshold voltage extraction methods on semiconductor device variability Espinera G, Nagy D, Garcia-Loureiro A, Seoane N, Indalecio G Solid-State Electronics, 159, 165, 2019 |
| 2 |
Scaling/LER study of Si GAA nanowire FET using 3D finite element Monte Carlo simulations Elmessary MA, Nagy D, Aldegunde M, Seoane N, Indalecio G, Lindberg J, Dettmer W, Peric D, Garcia-Loureiro AJ, Kalna K Solid-State Electronics, 128, 17, 2017 |