This paper presents a study of the impact that several widely used threshold voltage (V-T) extraction methods have on semiconductor device variability studies. The second derivative (SD), linear extrapolation (LE) and third derivative (TD) extraction techniques have been compared to the standard method used in variability, the constant current criteria (CC). To estimate the influence of these methods on the results, an ensemble of 10.7 nm gate length Si FinFETs affected by RD variability have been simulated. We have shown that variability estimators like the sigma V-T, < V-T > and the V-T shift, are heavily affected by the selected extraction methodology, with up to 30% differences in the standard deviation. We have demonstrated that being aware of which V-T extraction technique has been used in a variability analysis is crucial to properly interpret the results as they may be heavily method-dependent.