화학공학소재연구정보센터
Solid-State Electronics, Vol.54, No.10, 1083-1087, 2010
Analytical modeling of the gate tunneling leakage for the determination of adequate high-k dielectrics in double-gate SOI MOSFETs at the 22 nm node
In this paper, the gate leakage current in metal-oxide-semiconductor (MOS) junctions/devices/or transistors is modeled and studied in order to find promising materials for double-gate (DG) MOSFETs at 22 nm node by considering analytical models of the direct tunneling current (based on a proper calculation of the WKB tunneling probability in the gate oxide). We present a theoretical study to find the most promising gate oxide materials for the 22 nm technological node with the predicted maximum value of leakage current (10(-2) A/cm(2)) that is tolerable for that node, according to the ITRS roadmap. The effects of electron effective mass, dielectric constant k-value and barrier height on the Delta E-c-k permitted values have been studied. (C) 2010 Elsevier Ltd. All rights reserved.