Introducing metal or fully silicided gates in the semiconductor industry leads to improvements in MOSFET performance when compared to their polysilicon counterparts. However we will show, through Poisson-Schroedinger simulations, that when silicides are not treated as ideal metal contacts, the nonmetallic effects such as accumulation and depletion regions in the gate, although partially suppressed, are still present, even if the actual electron density of a metal is taken into account. The role of the dark space hidden beneath highly doped gates is discussed, highlighting overestimation of C-V measurements in the extraction of the oxide thickness. In terms of insulator thickness, a 0.2 nm correction is suggested for silicided gates, due to quantum corrections in the gate contact. An error of up to 15% in the evaluation of gate to channel capacitance was found, due to the quantization of the holes in accumulation. Finally, the impact of a substoichiometric insulator layer and the band-gap narrowing of highly-doped polysilicon gates is also discussed. (C) 2009 Elsevier Ltd. All rights reserved.