We have experimentally analyzed the leakage mechanism by comparing the planar DRAM cell and the recently developed DRAM cell transistors that have deeply recessed channels. We have identified important differences in the leakage mechanisms between planar MOSFETs and recessed channel MOSFETs, so we can suggest guidelines with respect to the optimal device structures for the recessed channel DRAM cell. (C) 2009 Elsevier Ltd. All rights reserved.