An improved metal-ferroelectric-insulator-semiconductor field-effect transistor (MFIS-FET) model is developed to study the effect of the ferroelectric-electrode interface. By assuming the interface layer possesses a secondary dielectric/ferroelectric phase. the C-V, I-V of the ferroelectric transistor and the surface potential of the semiconductor are simulated. The modeling results show that the electric characteristics of MFIS-FET become worse as the interface layer thickness increases, inferring the significant role the thickness plays in the model. Crown Copyright (C) 2009 Published by Elsevier Ltd. All rights reserved.