The reduction of the conductance of GaAs FETs by a negative voltage applied to the substrate, termed backgating or sidegating, is numerically modelled to clarify which type of traps is responsible. Modelling is carried out for several sets of deep levels in the substrate. It is observed that deep acceptors are mainly responsible for backgating independently of the shallow level type in the substrate. In this case there is no threshold. When deep donors are present in the substrate, it is observed that backgating is reduced and there is a threshold. The presence of a buffer layer between the channel and the semi-insulating substrate also helps in reducing backgating. (C) 2008 Elsevier Ltd. All rights reserved.