Metal-oxide-semiconductor (MOS) capacitors with silicon oxide (SiO2) as the gate dielectric were fabricated on n-type 4H-SiC. SiO2 was prepared by the room-temperature anodization (ANO) method followed by rapid thermal annealing. Thin SiO2 oxide layers (27-48 angstrom) were produced with various ANO time. The interfacial transition layer is not observed in this work. The oxide breakdown strengths are greater than 5 MV/cm and the capacitance-voltage hysteresis is negligible. Furthermore, the conduction mechanisms in positively and negatively biased regions are explored by the temperature responses of MOS capacitors. For the positively biased case, the conduction mechanism is shown to be dominated by Schottky emission with an effective barrier height of 1.10 +/- 0.12 eV. For the negatively biased case, the gate current is shown to be mainly due to the generation-recombination process in the depletion region. The integration of SiO2 on n-type 4H-SiC by a low thermal budget process is therefore possible. (C) 2008 The Electrochemical Society.