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Electrochemical and Solid State Letters, Vol.12, No.1, H4-H6, 2009
Enhancement of Stress-Memorization Technique on nMOSFETs by Multiple Strain-Gate Engineering
An enhanced stress memorization-technique that utilizes a strain proximity free technique (SPFT) and a stacked-gate structure has been demonstrated by multiple strain-gate engineering. The electron mobility of n-channel metal-oxide semiconductor field effect transistors (nMOSFETs) with SPFT exhibit a 16% increase compared to that of counterpart techniques. SPFT avoids the limitation of stressor volume for performance improvement in high-density complementary metal oxide semiconductor circuits. We also found that optimization of stacked, random poly-Si-grain gate structure in combination with SPFT can improve mobility further to 22% more than a single poly-Si gate structure without SPFT.
Keywords:CMOS integrated circuits;electron mobility;elemental semiconductors;hot carriers;MOSFET;reliability;silicon