Deep level transient spectroscopy (DLTS) and high-frequency capacitance-voltage (HF-CV) measurement are used for the investigation of HfAlO/p-Si interface. The so-called "slow'' interface states detected by HF-CV are obtained to be 2.68 x 10(11) cm(-2). Combined conventional DLTS with insufficient-filling DLTS (IF-DLTS), the true energy level position of interfacial traps is found to be 0.33 eV above the valance band maximum of silicon, and the density of such "fast'' interfacial traps is 1.91 x 10(12) cm(-2) eV(-1). The variation of energy level position of such traps with different annealing temperatures indicates the origin of these traps may be the oxide-related traps very close to the HfAlO/Si interface. The interfacial traps' passivation and depassivation effect of postannealing in forming gas are shown by comparing samples annealed at different temperatures. (C) 2008 Elsevier B. V. All rights reserved.