Thin Solid Films, Vol.515, No.19, 7662-7666, 2007
Influence of process steps on the performance of microcrystalline silicon thin film transistors
Bottom gate microcrystal line silicon thin film transistors (ttc-Si TFT) have been realized with two types of films: Vc-Si(l) and Vc-Si(2) with crystalline fraction of 80% and close to 100% respectively. On these TFTs we applied two types of passivation (Si?, and resist). pc-Si TFTs with resist as a passivation layer present a low leakage current of about 2.10(- 12) A for V-G = - 10 arid V-D = 0. 1 V an ON to OFF current ratio of 10(6), a threshold voltage of 7 V, a linear mobility of 0. 1 cm 2 V s, and a sub-threshold voltage of 0.9 V/dec. Microcrystalline silicon TFTs with Si?,, as a passivation present a new phenomenon: a parasitic current for negative gate voltage (- 15 V) causes a bump and changes the shape of the subthreshold region. This excess current can be explained by and oxygen contamination at the back interface. (c) 2006 Elsevier B.V All rights reserved.