Solid-State Electronics, Vol.48, No.7, 1119-1126, 2004
Electrothermal simulations of high-power SOI vertical DMOS transistors with lateral drain contacts under unclamped inductive switching test
Electrothermal effects during the unclamped inductive switching (UIS) of silicon-on-insulator (SOI) high power vertical double diffused MOS (VDMOS) transistors have been studied by device simulation. In the UIS test all the energy stored in the inductor during the on state is dumped directly into the device when the device is turned off. This extreme condition during the UIS test will give ratings for the power device and gives a measure for the stability of the device in the breakdown regime. Electrothermal simulations of this device are evaluated under boundary conditions imposed by the UIS circuit. Simulations show that UIS involves a substantial risk of turning the parasitic bipolar transistor (BJT) on. Our measurements of the fabricated SOU VDMOSFET in the static region are in good agreement with the expected impact of the self-heating on the saturation behaviour. The experiments at ambient temperature of 100 degreesC show that the breakdown voltage decreases as the drain voltage increases. This indicates that the parasitic BIT has been turned on and causes an open-base bipolar transistor breakdown voltage. (C) 2004 Elsevier Ltd. All rights reserved.
Keywords:vertical DMOS transistor;unclamped inductive switching;self-heating effect;parasitic bipolar transistor effect;silicon on insulator;high power;integration