In this paper, a standard CMOS technology is used to fabricate high performance Si/Si0.68Ge0.32 pMOS devices with thin Si cap layers. Careful fine-tuning of the epitaxial growth conditions and pre-epi surface treatment leads to the deposition of high quality facet free epitaxial layers. As compared to Si-only devices, the Si/Si0.68Ge0.32 devices exhibit strongly enhanced mobilities. For the best devices an increase by a factor of 2.5 can be seen. This enhanced mobility behaviour results in a strong increase of the on-state current and transconductance for devices with a gate length down to 0.13 mum. (C) 2003 Elsevier Science Ltd. All rights reserved.