화학공학소재연구정보센터
Solid-State Electronics, Vol.47, No.4, 705-711, 2003
Modeling of electron gate current and post-stress drain current of p-type silicon-on-insulator MOSFETs
In this paper, we present a complete and physics-based drain current model for hot-carrier damaged fully depleted silicon-on-insulator (SOI) p-type metal-oxide-semiconductor-field-effect-transistors (pMOSFETs). Experimentally, it was found that the post-stress drain current of SOI pMOSFETs increases, this is caused by hot-carrier-induced electron trapping in the oxide. We present an electron gate current model and use an oxide trapping mechanism for calculating the spatial distribution of oxide-trapping-charges, which are substituted into the damaged SOI MOSFET drain current model, then we can model the hot-carrier damaged drain current. To calculate the electron gate current in pMOSFETs at low gate bias, a complete electron gate current considering the subthreshold operation is developed. (C) 2002 Elsevier Science Ltd. All rights reserved.