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Electrochemical and Solid State Letters, Vol.8, No.10, G258-G260, 2005
Trilayer wafer passivation structure for (100) oriented silicon
A trilayer surface passivation structure is proposed in an effort to stifle inherent surface roughening caused during the thermal desorption of silicon native oxides. The method involves a trilayer structure consisting of two native oxides enclosing a thin sacrificial silicon layer, upon which, when heating the oxides, decomposes via reaction with the enclosed silicon. Experimental atomic force microscopy results indicate significant reduction in surface roughness from an root mean square value of 2.5 nm for an untreated wafer after oxide desorption, to 0.44 nm as the minimally obtained value, and 0.88 nm as the optimum value retaining a highly single-crystal surface. (c) 2005 The Electrochemical Society.