The wafer sagging during the vapor phase epitaxial (VPE) growth of silicon is determined. The proposed method relies upon the measurement of the size of the tree-ring pattern on the wafer backside after growth. From the Arrhenius plot, the apparent activation energy for sagging rate is empirically estimated to be 1.9 eV for the current systems. A quasi-static model is proposed to describe the transient wafer deflection across the wafer. In this case, the contact area between the wafer and the pocket changes over time due to wafer sagging into the susceptor pocket. It is demonstrated that the bending stress and the wafer deflection decrease in magnitude as the wafer progressively sags into the pocket. The model predicts a compressive stress at the sagging wafer front throughout the process. The deflection profile across the wafer is calculated and compared with the depth profile of the susceptor pocket. (c) 2005 Elsevier B.V. All rights reserved.