Wafer bonding increases the freedom of design in the integration of dissimilar materials. For example, it is interesting to combine III-V compounds that have direct band gap and high mobility with silicon (Si) that is extensively used in microelectronic applications. The interest to integrate III-V-based materials with Si arises primarily from two types of applications: smart pixels for optical intra- and inter-chip interconnects in the so-called optoelectrome integrated circuits, and optoelectronic devices using some material advantages of combining Ill-V with Si. Also, in the Ill-V industry larger substrates are crucial for higher efficiency in high-volume production, and especially so for monolithic microwave integrated circuits (MMIC). For indium phosphide (InP) the development of large-area substrates has not been able to keep up with market demands. One way to circumvent this problem is to use silicon substrates that are large-area, low-cost, and mechanically strong with high thermal conductivity. In addition, silicon is transparent at the emission wavelengths most often used in InP-based optoelectronics. Unfortunately, the large lattice-mismatch, 8.1%, between silicon and InP, has limited the success of heteroepitaxial growth. Hence, one alternative to be reviewed is InP-to-Si wafer bonding. When a direct semiconductor interface is not needed there are several other means of wafer bonding, e.g. adhesive, eutectic, and solid-state. These processes can be used for direct integration of small islets of epitaxially thin InP microelectronics onto other substrates, e.g. by transferring of InP-based epilayers to a Si-based microwave circuit by pick-and-place, BCB resist adhesive bonding and sacrificing of the InP substrate. (C) 2004 Elsevier B.V. All rights reserved.