Interstitial oxygen (O-i) related defect and reverse current leakage have been investigated on test trench metal-oxide-semiconductor field-effect transistors fabricated on epilayers over heavily arsenic-doped wafers (As++). The devices on the wafers sealed with polysilicon at backside exhibited an increased yield loss in reverse current leakage with increasing O-i concentration. The O-i concentration depth profiles indicate that O-i did precipitate out at the interface between the polysilicon layer and bulk silicon. This precipitation may consume the polylayer and reduce its gettering efficiency, which leads to an O-i-dependent current leakage. Similar experiments carried out with damaged backside As++ wafers show an overall low and O-i-independent current leakage yield loss. This reduced leakage yield loss is due to the intrinsic gettering effect of the O-i precipitates in these wafers close to the back surface. Transmission electron microscopy study revealed, in the junction region, the existence of intrinsic stacking faults and punch-out dislocation loop, characteristic of oxygen precipitation. The reverse current-voltage curves related to these defects have been quantitatively analyzed using the Shockley-Read-Hall model. The effective generation lifetimes of intrinsic stacking fault and punch-out dislocation loop are about 4.3 ps and 50 ns, respectively, and are significantly shorter than 2.5 mu s in defect-free area. (c) 2006 American Vacuum Society.