The adoption of low dielectric constant materials as inter-level dielectrics in microelectronics fabrication will ultimately depend on process integration. Porous SiO2 (PS) is one candidate material. Cleaning of residual polymer from trenches following etching using fluorocarbon plasmas and the deposition of a continuous barrier layer are critical processes for integration of PS as inter-level dielectrics. To investigate these issues, reactions mechanisms for plasma stripping of fluorocarbon polymer using oxygen containing plasmas and deposition of metal barrier coatings into PS trenches were developed, and incorporated into a feature profile model. The reaction mechanism was validated by comparison to experiments for blanket plasma etching of polytetrafluoroethylene using Ar-O-2 chemistries. Plasma stripping of fluorocarbon polymers from solid SiO2 (SS) trenches was found to be less efficient at higher aspect ratios. Stripping was also less efficient from PS trenches having large average pore radius and high interconnectivity. Cu ionized metal physical vapor deposition was investigated as a surrogate for barrier coating in SS and PS trenches. Compared to SS, thin film deposition was less conformal for PS having closed pore networks. Thicker films were required for interconnected PS to avoid pin-hole formation. (C) 2004 American Vacuum Society.