Conjugated polymer thin film transistors have been prepared using silicon dioxide (SiO2) and polyimide films as the dual layer gate dielectric on a plastic substrate. The dielectric layers were evaluated to investigate mechanical properties, surface morphology, capacitance-voltage and current-voltage characteristics. Spun polyimide and low temperature ion-beam deposited silicon dioxide layers were used as the gate dielectric, forming a dual layer structure. The organic layer with appropriate Young's modulus was found not only to improve the roughness of the SiO2 surface, but also to relieve the mechanical stress of the dielectric, and accordingly bring about enhanced device performance. The dual layer gate dielectric indicated a good insulating property of 10(-5) A/cm(2) at 3 MV/cm, flat band voltage of 0.5 V, and root-mean-square surface roughness of 0.6similar to1.2 nm. Based on the experiments, we built high performance plastic-based P3HT transistor including 0.007 cm(2)/V(.)s in carrier mobility and on/off current ratio of approximately 10(3). (C) 2003 Elsevier Science B.V. All rights reserved.