화학공학소재연구정보센터
Journal of Vacuum Science & Technology A, Vol.20, No.3, 962-965, 2002
Dry etch process optimization for small-area a-Si : H vertical thin film transistor
This article reports the investigation of dry etch processes suitable for small-area amorphous silicon (a-Si:H) vertical thin film transistor (VTFT) fabrication. SF6/O-2 and CF4/H-2 gas mixtures were experimented on for the anisotropic etching of an n(+) a-Si:H/a-SiNx : H/n(+) a-Si:H trilayer to give a self-aligned vertical drain-source stacked structure that is desirable for subsequent deposition of the VTFT channel layers. The results show that the trilayer profiles formed with the SF6/O-2 plasma for different 0, concentrations suffered different degrees of undercutting of the composite layers under overetching condition, leading to misaligned etch profiles. On the other hand, the CF4/20% H-2 plasma provides a self-aligned vertical trilayer profile even after 1 min of overetching.