This paper reports the results of extensive bias temperature annealing investigations made with metal-insulator semiconductor (MIS) capacitors of copper and fluorinated plasma-enhanced chemical vapor deposition (PECVD) oxide. Reduction of resistance-capacitance delay is necessary to improve interconnect performance. While copper has been accepted as the new interconnect metal, several low dielectric constant materials are being considered as potential replacements for silicon oxide. Fluorinated silicon oxides deposited by the PECVD process have a moderately low dielectric constant (K = 3.0-3.7). The film structure and electrical behavior of fluorinated films was found to depend on the flow rate of the fluorine precursor C2F6 In several cases, both fluorinated and nonfluorinated oxides exhibit significant leakage currents. The reason for such poor electrical behavior has been related to the presence of pinholelike defects (which were identified by KOH etch testing) in these oxides. The existence of such pinholes is believed to be associated with nucleation and growth processes during the deposition and the thickness of the deposited dielectric (100 nm) used in this investigation.