Fermi level pinning phenomenon at surfaces and interfaces of III-V materials is a still unsolved key issue and causes various unwanted problems in devices. In this paper, the present status of an approach to passivate surface states by an MBE-grown silicon interface control layer (Si ICL) is reviewed from both theoretical and experimental view points. First, UHV-based in situ surface characterization techniques required for successful developments of the Si ICL approach are briefly discussed with emphasis on two recently developed techniques, i.e. the UHV contactless C-V method and the photoluminescence surface state spectroscopy (PLS3) method. Then, Fermi level pinning phenomenon on MBE-grown surfaces and variously processed surfaces are discussed with their effects on operation and performance of devices. Subsequently, the fundamental theoretical and experimental aspects of the Si ICL technology are reviewed. The topics discussed include quantum state control in Si surface QW, UHV-STM study on atomic arrangements of Si ICL, effects of the initial surface reconstruction, process characterization and optimization by combined use of contactless C-V, XPS and UHV-PL methods. Finally, application of the Si ICL technique to MISFETs, insulated gated HEMTs and passivation of quantum structures are presented and discussed.