The capacitance-voltage (C-V) characteristics of metal-insulator-semiconductor (MIS) capacitors with an insulating layer of yttria-stabilized zirconia always show drift and hysteresis as a consequence of the measurement procedure. A new measurement method allows one to lock the C-V hysteresis loop around a voltage value independent of the time and of the voltage measurement range. This tracking method is based on an initial measurement of the shift of the C-V plots for both p- and n-type substrates. The method has been used to characterize the electrical properties of MIS capacitors with stabilized zirconia as a dielectric layer. Transmission electron microscopy observations of the structure of zirconia films and YSZ/Si interfaces are also presented.