Sub-100 nm metal-oxide-semiconductor field effect transistor gate structures have been fabricated using resolution-enhanced 248 nm optical lithography. We employed the chromeless phase-shift approach together with thin resists and optimized etches to achieve these results. Polysilicon gratings with critical dimension (CD)F approximate to 60 nm and TiN (damascene) gratings with CD approximate to 35 nm have been fabricated with good process latitudes. We are applying this process to the fabrication of basic test circuits for an aggressively scaled silicon on insulator complementary metal-oxide-semiconductor technology.