화학공학소재연구정보센터
Journal of the Electrochemical Society, Vol.145, No.5, 1668-1671, 1998
A low temperature silicon-on-insulator fabrication process using Si MBE on double-layer porous silicon
A series of low temperature processes incorporated in the silicon on insulator (SOI) formation using Si molecular beam epitaxial growth on porous silicon dramatically reduces the impurity ramp-up from the porous silicon substrate and lowers the doping level in the epitaxial Si layer. A double-layer porous silicon system with a spongy microstructure layer on top of a dendritic microstructure layer was fabricated on a moderately doped p-type Si wafer using a two-step anodization process, and was used as the substrate for Si epitaxy. An extended low temperature annealing in high vacuum was found to be helpful in stabilizing the porous silicon and making it less susceptible to microstructure change during the subsequent heat-treatment. Prior to epitaxy, a Ge-beam treatment was used to lower the temperature necessary for the Si surface cleaning. A low temperature preoxidation process stabilized the porous silicon during the subsequent high temperature oxidation. The choice of a moderately doped substrate and all these low temperature processes helped to achieve a Si epitaxial layer doping of 6 to 8 x 10(15) cm(-3), which is very close to meeting the requirement for direct device fabrication in the SOI without any additional doping compensation.