Plasma etching of polysilicon gate electrodes results in a degraded breakdown voltage for high perimeter, comb capacitor structures formed over p-silicon. p-Well structures with other geometric configurations and all n-well capacitor tor structures do not show this degradation. A low temperature oxidation during temperature ramping in the source/drain implant anneal can repair the gate dielectric damage, increasing the comb capacitor breakdown voltage by up to 1.5 MV/cm. Polysilicon reoxidation treatments after gate etching can also restore comb capacitor breakdown voltage, but their application is limited by the need to avoid metal oxide semiconductor field effect transistor short channel degradation and undesired bipolar transistor H-fe current gain increase.