A model describing how wearout leads to breakdown in thin silicon oxides has been developed. During wearout traps are generated inside of the oxide and at the oxide interfaces. In oxides thinner than 20 nm the dominant trap generation mechanism is determined by high field emission processes and not impact ionization. Locally higher current densities through the traps generated during wearout lead to local breakdown. This model is critically dependent on measurement of the traps generated inside of the oxide during the wearout and the measurement of these traps is described. The random nature of the wearout process is related to the statistical breakdown distributions. The ability of this model to describe oxide charging, low-level leakages, transient currents, the role of asperities, polarity dependences, and the fluence, time, thickness, voltage, and temperature dependences of oxide breakdown distributions are described.