To illustrate the impacts of stress/strain effect on nano-scale transistor, a theoretical investigation of stress/strain and transition region of interface are presented in this paper. It is found that the residual stress changes from - 1.8098 to 0.3159 GPa with Si layer thickness increasing. At the same time, Si-Si average bond length reduces from 2.397 angstrom to 2.355 angstrom and finally approaches to 2.352 angstrom (the bond length of ideal silicon crystal). The further calculations demonstrate that the above mentioned changes also decrease surface potential. And the relative decrease in the surface potential becomes larger with the applied gate voltage decreasing especially when it is less than 1.5 V. Moreover, when the doping concentration is 1 x 10(19)cm(-3), the threshold voltage and subthreshold swing (SS) reduce from 2.9 V to 2 V and 551mV/dec to 198mV/dec respectively. It implies that we can get a better device performance by growing appropriate thickness of silicon.