Experimental extraction of the electron trap parameters which are associated with charge trapping into gate insulators under the positive bias temperature stress (PBTS) is proposed and demonstrated for the first time in amorphous indium-gallium-zinc-oxide thin-film transistors. This was done by combining the PBTS/recovery time-evolution of the experimentally decomposed threshold voltage shift (Delta V-T) and the technology computer-aided design (TCAD)-based charge trapping simulation. The extracted parameters were the trap density (N-OT) = 2.6 x 10(18) cm(-3), the trap energy level (Delta E-T)= 0.6 eV, and the capture cross section (sigma(0))= 3 x 10-(19) cm(2). Furthermore, based on the established TCAD framework, the relationship between the electron trap parameters and the activation energy ( Ea) is comprehensively investigated. It is found that Ea increases with an increase in s0, whereas Ea is independent of NOT. In addition, as Delta E-T increases, Ea decreases in the electron trapping-dominant regime (low Delta E-T) and increases again in the Poole-Frenkel (PF) emission/hopping-dominant regime (high Delta E-T). Moreover, our results suggest that the cross-over Delta E-T point originates from the complicated temperature-dependent competition between the capture rate and the emission rate. The PBTS bias dependence of the relationship between Ea and Delta E-T suggests that the electric field dependence of the PF emission-based electron hopping is stronger than that of the thermionic field emission-based electron trapping.