Eight-transistor (8T) cells were introduced to improve variability tolerance, cell stability and low-voltage operation in high-speed SRAM caches by decoupling the read and write design requirements. Altogether, 8T-SRAM can be designed without significant area penalty over 6T-SRAM. Ionizing radiation effects are nowadays a major concern for reliability and dependability of emerging electronic SRAM devices, even for sea-level applications. In this paper we demonstrate from experimental results that the 8T-SRAM also exhibits an enhanced overall intrinsic tolerance to alpha particle radiation even though its critical charge values are smaller than conventional 6T cells. We have experimentally found that the soft error rate measured in accelerated experiments with alpha particles in SRAM devices implemented in a 65 nm CMOS is 56% better for 8T cells with respect to standard 6T-cells. Even more, we show that this value can be increased up to a 200% through transistor sizing optimization. (C) 2015 Elsevier Ltd. All rights reserved.