화학공학소재연구정보센터
Korean Journal of Materials Research, Vol.25, No.9, 429-434, September, 2015
Pt 나노입자가 분산된 SiO2 박막의 저항-정전용량 관계
Relation between Resistance and Capacitance in Atomically Dispersed Pt-SiO2 Thin Films for Multilevel Resistance Switching Memory
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Resistance switching memory cells were fabricated using atomically dispersed Pt-SiO2 thin film prepared via RF co-sputtering. The memory cell can switch between a low-resistance-state and a high-resistance-state reversibly and reproducibly through applying alternate voltage polarities. Percolated conducting paths are the origin of the low-resistance-state, while trapping electrons in the negative U-center in the Pt-SiO2 interface cause the high-resistance-state. Intermediate resistance-states are obtained through controlling the compliance current, which can be applied to multi-level operation for high memory density. It is found that the resistance value is related to the capacitance of the memory cell: a 265-fold increase in resistance induces a 2.68-fold increase in capacitance. The exponential growth model of the conducting paths can explain the quantitative relationship of resistance-capacitance. The model states that the conducting path generated in the early stage requires a larger area than that generated in the last stage, which results in a larger decrease in the capacitance.
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