This paper presents mechanical simulations results of an innovative strain transfer structure consisting in a buried compressive SiGe layer embedded under an ultra-thin buried oxide (BOX). We studied the influence of different dimensions including the active area and determined optimal parameters of the SiGe layer maximizing the strain. We demonstrate a transfer of a tensile stress up to 1.3 GPa in the silicon. Thanks to 3D simulations and the study of stress profiles in the SOL the electron mobility enhancement is estimated to be about 80% for logic transistors at the 10 nm node. The strain induced in the channel by the edge relaxation of an embedded buried SiGe layer is compared to strained Silicon-On-Insulator (sSOI) wafers and strained nitride layer for Fully Depleted Silicon-On-Insulator (FDSOI). (C) 2014 Elsevier Ltd. All rights reserved.