This work presents a Non-Volatile SRAM (NV-SRAM) cell, resilient to information loss. The cell features fast storage (20 ns) for the operating voltage of 1.0 V. The information is backed-up during POWER-DOWN/RESTORE cycle in two bipolar Oxide Resistive RAMs (OxRRAMs). The proposed NV-SRAM is designed with an 8T2R structure using 22 nm FDSOI technology and resistive memory devices based on HfO2. The stability and the reliability of the NV-SRAM cell is investigated by taking into account the variability of the transistors. It is shown that high R-OFF/R-ON is necessary to ensure reliable RESTORE operation and high SRAM yield under cell area and power consumption constraints. (C) 2013 Elsevier Ltd. All rights reserved.