In this work, the impact of the substrate bias on the sense margin and retention behavior in 1T-DRAM bulk FinFET memory cells is discussed. It will be shown that the substrate bias can be used to increase both the sense margin and retention time. For fixed wordline and bitline biasing conditions, a substrate bias can be found where sense margin and retention time are optimal. This substrate bias results from a trade-off between the storage of electrons and holes and the impact of the read-out bias conditions. (C) 2011 Elsevier Ltd. All rights reserved.