In this paper, we report power 4H-SiC DMOSFETs with a 10 kV blocking capability the highest reported blocking voltage for a switching device in SiC to this date. The devices utilized 115 mum thick n-type epilayers with a doping concentration of 6 x 10(14) cm(-3) for drift layers. Three zone Junction Termination Extension (JTE) regions formed by boron ion-implantations were employed as edge termination for the devices, which reduced the sensitivity of blocking capability of the devices to process variations. The gate oxide layer was formed by thermal oxidation at 1200degreesC, followed by an N2O anneal at 1300degreesC. A peak effective channel mobility of 14.5 cm(2)/Vs and a threshold voltage of 10 V were measured from a test MOSFET with a W/L of 150 mum / 150 mum, which was built adjacent to the power DMOSFETs. A 4H-SiC DMOSFET with an active area of 4.2 x 10(-3) cm(2) showed a specific on-resistance of 236 mOmega-cm(2) at room temperature with a gate bias of 25 V. The device shows a leakage current of 70 muA, which corresponds to a leakage current density of 16 mA-cm(-2) at a drain bias of 10 kV.