A high density of interface traps, poor surface morphology and poor oxide reliability has quelled much of the initial enthusiasm for 4H-SiC MOS devices. In this work, we report exciting new results for performance and reliability obtained on (0001) 4H-SiC MOS structures by addressing two critical issues-reducing D-IT and improving surface morphology. Nitridation via NO and N2O annealing of the 4H-SiC MOS interface has been effective in decreasing DIT near the conduction band edge. However, this passivation technology is limited by the in-situ oxidation of the 4H-SiC surface. We have appended a pure nitridation anneal (Nitridation A) to our standard gate oxidation process thereby reducing D-IT to 1.86E11 eV(-1) cm(-2) at 0.2 eV below the conduction band. Further optimization of this pure nitridation process (Nitridation B) has resulted in DIT being reduced below 1E11 eV(-1) cm(-2) near the conduction band with very classical (silicon-like) behavior in the conductance-frequency curves. Using the Nitridation A process, lateral MOSFETs have been carefully fabricated to maintain the surface integrity. Record high field-effect mobility measured on these MOSFETs are 50 cm(2)/V-s and 73 cm(2)/V-s for thermally grown and LPCVD oxides, respectively. For the first time, 300degreesC TDDB extrapolates to >100 years lifetime at an operating field of 3 MV/cm for the nitrided thermal gate oxide. Encouragingly, we observe that capacitor reliability is consistent with MOSFET reliability.