Ion implantation accompanied by high temperature anneal process is essential for the formation of n- or p-type doping region in silicon carbide. Macrosteps are often formed on the surface of silicon carbide after the high temperature annealing. This may degrade the electrical properties of SiC semiconductor. In this paper, the cap oxide layer effect on the suppression of macrostep formation during high temperature anneal has been investigated in the case of ion-implanted 4H-SiC. The thermally-grown SiO2 layer on the 4H-SiC substrate was found to suppress the macrostep formation even at an annealing temperature of 1600 degreesC. It was shown that the cap layer effect has an oxide thickness dependence. No macrosteps were observed if the thickness of the oxide layer exceeds 50nm. In this case the oxide remains on the surface of 4H-SiC after the anneal process. On the other hand, well-developed macrosteps were observed in case of a relatively thin (10nm) thermal oxide layers which were completely removed during the anneal process.