We invented a method to fabricate graphene field effect transistors (GFETs) on oxidized silicon wafers in a Silicon CMOS compatible process. The graphene layers needed are grown in situ by means of a transfer-free catalytic chemical vapor deposition (CCVD) process directly on silicon dioxide. Depending on the process parameters the fabrication of single, double or multi-layer graphene FETs (GFETs) is possible. The produced graphene layers have been characterized by SEM, TEM, TEM-lattice analysis as well as Raman-Spectroscopy. Directly after growth, the fabricated GFETs are electrically functional and can be electrically characterized via the catalyst metals which are used as contact electrodes. In contrast to monolayer graphene FETs, the fabricated bilayer graphene FETs (BiLGFETs) exhibit unipolar p-type MOSFET behavior. Furthermore, the on/off current-ratio of 10(4) up to several 10(7) at room temperature of the fabricated BiLGFETs allows their use in digital logic applications [1]. In addition, a stable hysteresis of the GFETs enables their use as memory devices without the need of storage capacitors and therefore very high memory device-densities are possible. The whole fabrication process is fully Si-CMOS compatible, enabling the use of hybrid silicon/graphene electronics. (C) 2013 Elsevier B.V. All rights reserved.