SiGe-on-insulator (SGOI) substrates with different Ge fractions (Ge%) were fabricated using Ge condensation technique High acceptor concentration (NA) in SGOI layer and interface-trap density (D.,) at SGOI/buried oxide (BOX) interface were found by using back-gate metal-oxide-semiconductor field-effect transistor method. For the reduction of high N(A) and D(it), Al deposition and the Subsequent post-deposition annealing (Al-PDA) were carried Out. As a comparison, a forming gas annealing (FGA) was also performed in H(2) ambient It was found that both Al-PDA and FGA effectively reduced N(A) and D(it) for low-Ge% SGOI However, with an increase in Ge%, FGA became less effective while Al-PDA was very effective for the reduction of NA and D(it). (C) 2009 Elsevier B.V. All rights reserved