Flip chip technology has become one of the major joining technologies in electronic packaging. With the trend toward miniaturization, solder bumps are getting smaller, and the electric current loading of each solder bump is getting higher. At solder joints, different materials are brought into contact, and there are compositional gradients at the interfaces. As an electric current passes through, the Joule heating and electromigration effects occur in the flip chip solder bumps. The joints heat up as a result of the Joule heating effect. Atoms in the solder joints move as a result of both diffusion and electromigration. In this study, current distributions in various microstructures with different shapes of voids and multi-phases of solders were calculated, and the calculated results were compared with experimental observations. The current crowding effect and temperature distributions in flip chip solders are discussed. It is found that the highest consumption rates of barrier layers in certain parts of flip-chip joints are related to the current crowding phenomena. It is also found that the geometry of a flip-chip joint and void formation have stronger effects upon current crowding than the multi-phase nature of solder bumps does.