Solid-State Electronics
Solid-State Electronics, Vol.52, No.4 Entire volume, number list
ISSN: 0038-1101 (Print)
In this Issue (17 articles)
| 488 - 488 |
Foreword Ponomarev YV |
| 489 - 497 |
In-depth electrical characterization of sub-45 nm fully depleted strained SOI MOSFETs with TiN/HfO2 gate stack Feruglio S, Andrieu F, Faynot O, Ghibaudo G |
| 498 - 505 |
On the electron mobility enhancement in biaxially strained Si MOSFETs Driussi F, Esseni D, Selmi L, Hellstrom PE, Malm G, Hallstedt J, Ostling M, Grasby TJ, Leadley DR, Mescot X |
| 506 - 513 |
Monte-Carlo simulation of MOSFETs with band offsets in the source and drain Braccioli M, Palestri P, Mouis M, Poiroux T, Vinet M, Le Carval G, Fiegna C, Sangiorgi E, Deleonibus S |
| 514 - 518 |
Mobility in graphene double gate field effect transistors Lemme MC, Echtermeyer TJ, Baus M, Szafranek BN, Bolten J, Schmidt M, Wahlbrink T, Kurz H |
| 519 - 525 |
3D nanowire gate-all-around transistors: Specific integration and electrical features Dupre C, Ernst T, Maffim-Alvaro V, Delaye V, Hartmann JM, Borel S, Vizoz C, Faynot O, Ghibaudo G, Deleonibus S |
| 526 - 532 |
Theoretical foundations of the quantum drift-diffusion and density-gradient models Baccarani G, Gnani E, Gnudi A, Reggiani S, Rudan M |
| 533 - 539 |
Novel concepts for improved communication between nerve cells and silicon electronic devices Huys R, Braeken D, Van Meerbergen B, Winters K, Eberle W, Loo J, Tsvetanova D, Chen C, Severi S, Yitzchaik S, Spira M, Shappir J, Callewaert G, Borghs G, Bartic C |
| 540 - 547 |
Impact of channel orientation on ballistic current of nDGFETs with alternative channel materials Rafhay Q, Clerc R, Ferrier M, Pananakakis G, Ghibaudo G |
| 549 - 549 |
Foreword Van Houdt J |
| 550 - 556 |
Use of Al2O3 as inter-poly dielectric in a production proven 130 nm embedded Flash technology Kakoschke R, Pescini L, Power JR, van der Zanden K, Andersen EO, Gong Y, Allinger R |
| 557 - 563 |
Performance and reliability of HfAlOx-based interpoly dielectrics for floating-gate Flash memory Govoreanu B, Wellekens D, Haspeslagh L, Brunco DP, De Vos J, Aguado DR, Blomme P, van der Zanden K, Van Houdt J |
| 564 - 570 |
Multi-layer high-kappa interpoly dielectric for floating gate flash memory devices Zhang L, He W, Chan DSH, Cho BJ |
| 571 - 576 |
Charge cross talk in sub-lithographically shrinked 32 nm Twin Flash (TM) memory cells Beug MF, Knofler R, Ludwig C, Hagenbeck R, Muller T, Riedel S, Hohr T, Sachse JU, Nagel N, Mikolajick T, Kusters KH |
| 577 - 583 |
Physical understanding and modeling of SANOS retention in programmed state Furnemont A, Cacciato A, Breuil L, Rosmeulen M, Maes H, De Meyer K, Van Houdt J |
| 584 - 590 |
Explanation of programming distributions in phase-change memory arrays based on crystallization time statistics Mantegazza D, Ielmini D, Pirovano A, Lacaita AL, Varesi E, Pellizzer F, Bez R |
| 591 - 595 |
Writing current reduction and total set resistance analysis in PRAM Jeong CW, Kang DH, Ha DW, Song YJ, Oh JH, Kong JH, Yoo JH, Park JH, Ryoo KC, Lim DW, Park SS, Kim JI, Oh YT, Kim JS, Shin JM, Park J, Fai Y, Koh GH, Jeong GT, Jeong HS, Kim K |