Solid-State Electronics

Solid-State Electronics, Vol.152 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (15 articles)

1 - 3	Effectively reducing the switching voltages based on CdS/ZnO heterostructure for resistive switching memory Duan WJ
4 - 10	Two-step degradation of a-InGaZnO thin film transistors under DC bias stress Hu CF, Teng T, Qu XP
11 - 16	High-periphery GaN HEMT modeling up to 65 GHz and 200 degrees C Crupi G, Raffo A, Vadala V, Vannini G, Caddemi A
17 - 23	Island diodes triggering SCR in waffle layout with high failure current for HV ESD protection Zheng YF, Jin XL, Wang Y, Guan J, Hao SW, Luo J
24 - 28	Growth of AlGaN/GaN heterostructure with lattice-matched AlIn(Ga)N back barrier Kim JG, Kang SH, Janicki L, Lee JH, Ju JM, Kim KW, Lee YS, Lee SH, Lim JW, Kwon HS, Lee JH
29 - 32	Achieving enhanced pH sensitivity using capacitive coupling in extended gate FET sensors with various high-K sensing films Kang JW, Cho WJ
33 - 40	Investigation on single pulse avalanche failure of SiC MOSFET and Si IGBT Ren N, Hu H, Lyu XF, Wu JP, Xu HY, Li RG, Zuo Z, Wang K, Sheng K
41 - 45	Investigation of transient current characteristics with scaling-down poly-Si body thickness and grain size of 3D NAND flash memory Lee SH, Kwon DW, Kim S, Baek MH, Lee S, Kang J, Jang W, Park BG
46 - 52	Device scaling considerations for sub-90-nm 2-bit/cell split-gate flash memory cell Xu ZZ, Liu DH, Hu J, Chen WJ, Qian WS, Kong WR, Zou SC
53 - 57	Pulse duration effect during pulsed gate-bias stress in a-InGaZnO thin film transistors Kim WS, Kang YS, Cho YJ, Park J, Kim G, Kim O
58 - 64	Improvement in drain-induced-barrier-lowering and on-state current characteristics of bulk Si fin field-effect-transistors using high temperature Phosphorus extension ion implantation Kikuchi Y, Hopf T, Mannaert G, Everaert JL, Kubicek S, Eyben P, Waite A, Borniquel JID, Variam N, Mocuta D, Horiguchi N
65 - 71	An accurate expression to estimate the metal gate granularity induced threshold voltage variability in NWFETs Vardhan PH, Ganguly S, Ganguly U
72 - 80	On the extraction of resistivity and area of nanoscale interconnect lines by temperature-dependent resistance measurements Adelmann C
81 - 92	A global parameters extraction technique to model organic field effect transistors output characteristics Fatima S, Rafique U, Ahmed UF, Ahmed MM
93 - 99	Heavy ion-induced single event effects in active pixel sensor array Cai YL, Guo Q, Li YD, Wen L, Zhou D, Feng J, Ma LD, Zhang X, Wang TH