화학공학소재연구정보센터

Solid-State Electronics

Solid-State Electronics, Vol.143 Entire volume, number list
ISSN: 0038-1101 (Print) 

In this Issue (15 articles)

1 - 1 Preface to the special issue of Solid State Electronics EUROSOI/ULIS 2017
Nassiopoulou AG
2 - 9 The prospects of transition metal dichalcogenides for ultimately scaled CMOS
Thiele S, Kinberger W, Granzner R, Fiori G, Schwierz F
10 - 19 A review of the Z(2)-FET 1T-DRAM memory: Operation mechanisms and key parameters
Cristoloveanu S, Lee KH, Parihar MS, El Dirani H, Lacord J, Martinie S, Le Royer C, Barbe JC, Mescot X, Fonteneau P, Galy P, Gamiz F, Navarro C, Cheng B, Duan M, Adamu-Lema F, Asenov A, Taur Y, Xu Y, Kim YT, Wan J, Bawedin M
20 - 26 Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line
Perez EAAL, Guenery PV, Abouzaid O, Ayadi K, Brottet S, Moeyaert J, Labau S, Baron T, Blanchard N, Baboux N, Militaru L, Souifi A
27 - 32 Detailed characterisation of Si Gate-All-Around Nanowire MOSFETs at cryogenic temperatures
Boudier D, Cretu B, Simoen E, Veloso A, Collaert N
33 - 40 Kink effect in ultrathin FDSOI MOSFETs
Park HJ, Bawedin M, Choi HG, Cristoloveanu S
41 - 48 Insight into carrier lifetime impact on band-modulation devices
Parihar MS, Lee KH, Park HJ, Lacord J, Martinie S, Barbe JC, Xu Y, El Dirani H, Taur Y, Cristoloveanu S, Bawedin M
49 - 55 Multi-Subband Ensemble Monte Carlo simulations of scaled GAA MOSFETs
Donetti L, Sampedro C, Ruiz FG, Godoy A, Gamiz F
56 - 61 Static and low frequency noise characterization of ultra-thin body InAs MOSFETs
Karatsori TA, Pastorek M, Theodorou CG, Fadjie A, Wichmann N, Desplanque L, Wallart X, Bollaert S, Dimitriadis CA, Ghibaudo G
62 - 68 Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents
Narimani K, Glass S, Bernardy P, von den Driesch N, Zhao QT, Mantl S
69 - 76 Out-of-equilibrium body potential measurements in pseudo-MOSFET for sensing applications
Benea L, Bawedin M, Delacour C, Ionica I
77 - 82 Three-dimensional vertical Si nanowire MOS capacitor model structure for the study of electrical versus geometrical Si nanowire characteristics
Hourdakis E, Casanova A, Larrieu G, Nassiopoulou AG
83 - 89 Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion
Cazimajou T, Legallais M, Mouis M, Ternon C, Salem B, Ghibaudo G
90 - 96 Second Harmonic Generation characterization of SOI wafers: Impact of layer thickness and interface electric field
Damianos D, Vitrant G, Lei M, Changala J, Kaminski-Cachopo A, Blanc-Pelissier D, Cristoloveanu S, Ionica I
97 - 102 An innovative large scale integration of silicon nanowire-based field effect transistors
Legallais M, Nguyen TTT, Mouis M, Salem B, Robin E, Chenevier P, Ternon C