검색결과 : 5건
| No. | Article |
|---|---|
| 1 |
Analytical model of drain current of strained-Si/strained-Si1-yGey/relaxed-Si1-xGex NMOSFETs and PMOSFETs for circuit simulation Bindu B, DasGupta N, DasGupta A Solid-State Electronics, 50(3), 448, 2006 |
| 2 |
N-channel MOSFETs fabricated on He-implanted and annealed SiGe buffer layers Mooney PM, Rim K, Christiansen SH, Chan KK, Chu JO, Cai J, Chen H, Jordan-Sweet JL, Yang YY, Boyd DC Solid-State Electronics, 49(10), 1669, 2005 |
| 3 |
Numerical simulation of strained Si/SiGe devices: the hierarchical approach Meinerzhagen B, Jungemann C, Neinhus B, Bartels M Applied Surface Science, 224(1-4), 235, 2004 |
| 4 |
Performance assessment of scaled strained-Si channel-on-insulator (SSOI) CMOS Kim K, Chuang CT, Rim K, Joshi RV Solid-State Electronics, 48(2), 239, 2004 |
| 5 |
Power analysis of strained-Si device s/circuits Kim K, Joshi RV, Chuang CT Solid-State Electronics, 48(8), 1453, 2004 |