| 1 |
Shallow trench isolation geometric influence of a recessed surface on array-type arrangements of nano-scaled devices strained by contact etch stop liner and Ge-based stressors
Hsieh CP, Liao MH, Lee CC, Cheng TC, Wang CP, Huang PC, Cheng SW
Thin Solid Films, 618, 172, 2016 |
| 2 |
Nanoscale CMOSFET performance improvement and reliability study for local strain techniques
Huang HL, Chen JK, Houng MP
Solid-State Electronics, 79, 31, 2013 |
| 3 |
Phenomena of n-type metal-oxide-semiconductor-field-effect-transistors with contact etch stop layer stressor for different channel lengths
Hsu HW, Lin KC, Lee CC, Twu MJ, Huang HS, Chen SY, Peng MR, Teng HH, Liu CH
Thin Solid Films, 544, 120, 2013 |
| 4 |
High gate voltage drain current leveling off and its low-frequency noise in 65 nm fully-depleted strained and non-strained SOI nMOSFETs
LukyanchikovA N, Garbar N, Kudina V, Smolanka A, Lokshin M, Simoen E, Claeys C
Solid-State Electronics, 52(5), 801, 2008 |
| 5 |
Impact strain engineering on gate stack quality and reliability
Claeys C, Simoen E, Put S, Giusi G, Crupi F
Solid-State Electronics, 52(8), 1115, 2008 |
