검색결과 : 5건
| No. | Article |
|---|---|
| 1 |
Thermally-induced failures of copper through-silicon via structures evaluated by the strain energy density model Han CF, Lin JF Thin Solid Films, 615, 281, 2016 |
| 2 |
Wetting process of copper filling in through silicon vias Zhang JH, Luo W, Li Y, Gao LM, Li M Applied Surface Science, 359, 736, 2015 |
| 3 |
Stress measurements in tungsten coated through silicon vias for 3D integration Krauss C, Labat S, Escoubas S, Thomas O, Carniello S, Teva J, Schrank F Thin Solid Films, 530, 91, 2013 |
| 4 |
Failure mechanism of copper through-silicon vias under biased thermal stress Seo SH, Hwang JS, Yang JM, Hwang WJ, Song JY, Lee WJ Thin Solid Films, 546, 14, 2013 |
| 5 |
Three-dimensional integration in microelectronics: Motivation, processing, and thermomechanical modeling Cale TS, Lu JQ, Gutmann RJ Chemical Engineering Communications, 195(8), 847, 2008 |